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16:44
<
grw >
anyone tried diskless boot on aarch64?
16:45
<
grw >
seems a nice way to avoid slow mmc i/o
16:45
<
gchristensen >
I've done it on high-end server hw
16:45
<
grw >
on the cavium?
16:46
<
grw >
i think scaleway use it for their armv7 boxes too
16:46
<
gchristensen >
yeah the cavium
16:47
<
grw >
what do you use as target?
16:48
<
grw >
i think my next step is hacking gonbdserver to serve nix-store paths directly :)
16:48
<
gchristensen >
what do you mean as target?
16:49
<
gchristensen >
oh, it is just a ramdisk
16:50
<
grw >
i mean the server software
16:50
<
gchristensen >
it is an ipxe image
16:50
<
gchristensen >
so just http
16:50
<
gchristensen >
sorry if I'm not following, I'm a bit of a novice in this area :)
16:50
<
grw >
that would be easier..
16:51
<
grw >
me too, my cluster is total pile of hacks :D
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19:36
<
arianvp2 >
everybody's cluster is a total pile of hacks
19:37
<
arianvp2 >
wait wat. Bazel is written in java?
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21:28
<
samueldr >
just bought a discounted Rockchip 3288-C chromebit :)
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23:06
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sphalerite >
samueldr: woo, same chipset as my chromebook! If you need any guidance on getting nixos running on it feel free to ask me :)
23:06
<
samueldr >
that's partly why
23:07
<
samueldr >
I'll be able to look at the first blocks on the device
23:07
<
samueldr >
see if they too are read-only
23:07
<
samueldr >
I hope also to build a "proper" u-boot for it
23:07
<
samueldr >
I didn't find yet (didn'T look hard enough) information on whether there are uart or serial pads
23:14
<
sphalerite >
So would that be coreboot -> U-boot rather than coreboot -> depthcharge?
23:14
<
sphalerite >
Personally I think it'd be cooler to have coreboot load Linux directly
23:16
<
samueldr >
sure, but I assumed that it was u-boot -> depth charge
23:16
<
samueldr >
I thought chrome* hardware used coreboot only on intel?
23:16
* samueldr
needs to do some reading
23:17
<
samueldr >
if it's u-boot, though, the infra is already all in nixos :)
23:21
<
samueldr >
I love how google mandates upstreaming everything with chromeos
23:26
<
samueldr >
ah, if it's like the C201 I'll be pretty safe playing around with coreboot, I just received an SOIC clip recently
23:58
<
samueldr >
clever // someone added clever's binary cache for armv7l on the wiki, I'm assuming this is okay in my edit over the section, but if clever doesn't want it publicized ping me and I'll remove it
23:59
<
samueldr >
(prefixing since I read previously it will only match as a prefix)
23:59
<
gchristensen >
what is it?