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<
clever>
gchristensen: SMA connectors, possibly RP-SMA
<
gchristensen>
why?
<
clever>
give the number of them, i'm guessing some kind of high speed serial data links
<
gchristensen>
I don't even see a mention about it on that site
<
andi->
They derived that from a prototyping board with exchangable CPU iirc.. Probably some Debug interface
<
clever>
do they mention anything like clustering?
<
clever>
how open are the designs?
<
clever>
ah, the image on the web-page is heavily downscaled, opening it directly gives a much better view
<
clever>
i can even read the labels on those sma's
<
clever>
they appear to be on the DDR bus
<
clever>
and a few others
<
clever>
FTDI on the top left, so the micro-usb port will show up as a serial usb adapter
<
gchristensen>
DMA? :)
<
clever>
the FTDI is likely just wired to the uart pins on the cpu, for normal serial console
<
clever>
they just saved you the trouble of finding a 3.3v usb serial adapter
<
gchristensen>
yeah, but SMA to DDR
<
clever>
they are only on a few control pins
<
clever>
i suspect its to confirm the waveforms, and adjust the drive signals
<
gchristensen>
yeah... that would make sense
<
gchristensen>
for development
<
clever>
the memory controller has adjustable drive strenghts, that have to be tuned to match the board layout
<
gchristensen>
but they're selling this
<
clever>
removing those connectors may change the exact tuning required
<
gchristensen>
what a nightmare
<
clever>
the original xbox did even more nasty things
<
clever>
it dynamicaly overclocked the ram, and then did a memory test, and backed off until it would stabalize
<
gchristensen>
whoa
<
clever>
so rather then the memory clock being fixed for the model, it was based on how good/bad your ram chips are
<
clever>
and some games where tested on a board with fast ram
<
clever>
then fail to run on a board with slow ram
<
clever>
which reminds me of a programming thru evolution thing somebody did with FPGA's
<
clever>
they just generated a random bitstream of config for the fpga, and evolved it until it solved the goal
<
clever>
but it only worked on that one fpga
<
gchristensen>
haha so cool
<
clever>
because it relied on subtle timing differences
<
clever>
and didnt do proper latching on a clock
<
clever>
i also see a dip switch on the top of the hifive, that changes the ddr voltages
<
clever>
that feels like something that could potentially brick a board if set wrong
<
samueldr>
it's definitely not a end-user SBC :)
<
clever>
it appears to have 3 different types of cores, and a total of 10 cores?
<
clever>
oh, no, they listed the 4+1 twice
<
clever>
2 types, total of 5
<
clever>
ECC ram is good
<
clever>
interesting, they mention the open iot summit
<
clever>
how "open" is it?
<
gchristensen>
based on that, probably not very